1. Field of the Invention
The present invention relates to a semiconductor device including an insulated-gate semiconductor element such as an IEGT.
2. Description of the Related Art
In order to utilize power energy effectively, power converting apparatuses such as a converter or an inverter using a power semiconductor device are widely used. As the power semiconductor device, such an insulated-gate semiconductor device as an IEGT (Injection Enhanced Gate Bipolar Transistor) or an IGBT (Insulated Gate Bipolar Transistor) is used. The IEGT or IGBT allows size-reduction of peripheral circuits such as a control circuit or a protective circuit and can achieve a low loss, a high speed and a low cost. Here, an IGBT obtained by performing such a treatment as thinning contacts for an emitter electrode to enhance electron injection is called “the IEGT”.
In an IEGT having a trench gate structure described in Japanese Patent Application Laid-open No. 10-321856 (JP-A), refer to a description from pages 3 to 7, FIG. 59, and FIG. 64) (Patent Literature 1) and “IEGT design concept against operation instability and its impact to application”, by Ichiro Omura, et al, Proceedings of the International Symposium on Power Semiconductor Devices & ICs (ISPSD 2000), (US), IEEE, May, 2000, p. 25 to 28) (Non-Patent Literature 2), a p-type base layer is formed on a first face of a n-type base layer. A plurality of trenches extending from the p-type base layer to the n-type base layer are formed. The trenches are formed such that their bottom portions reach inside of the n-type base layer. Gate electrodes are formed by embedding conductive layers into the trenches via gate-insulating films. A unit cell contains two gate electrodes. A n-type source layer is formed on a surface region of the p-type base layer between the two gate electrodes so as to come in contact with one side walls of the respective trenches. That is, the n-type source layer is formed so as to come in contact with the respective gate electrodes via the gate-insulating film. Here, the other side walls of the trenches are not formed with a n-type source layer. Here, a common emitter electrode is formed on the p-type base layer and the n-type source layer.
On the other hand, a p-type emitter layer is formed on a second surface of the n-type base layer. A collector electrode is formed on the p-type emitter layer. A plurality of unit cells thus formed are respectively connected in parallel.
Next, an operation method of the IEGT formed in this manner will be described. When a voltage forming a positive voltage relative to the emitter electrode is applied to the collector electrode and a voltage forming a positive voltage relative to the emitter electrode is applied to the gate electrode, the IEGT is turned on to be put in a conductive state. That is, when a positive voltage is applied to the gate electrode, a channel for electrons is first formed in the p-type base layer between the n-type base layer and the n-type source layer, and an electron current flows from the n-type source layer to the n-type base layer. Further, a hole current flows from the p-type emitter layer to the n-type base layer. Thereby, conduction modulation takes place in the n-type base layer and the IEGT turns on to become electrically conductive.
Here, such a constitution is employed that a contact portion connecting to the emitter electrode is not formed on the surface region of the p-type base layer which is not formed with an n-type source layer, which results in thinning contact portions for an emitter electrode. With such formation, holes are accumulated in the n-type base layer in an electrically conductive state so that an effect of conductive modulation is increased, which can achieve reduction in ON-state voltage.
On the other hand, by applying, to the gate electrode, such a voltage forming 0 or a negative voltage relative to the emitter electrode, the IEGT is turned OFF to be put in a blocking state. By applying, to the gate electrode, such a voltage forming 0 or a negative voltage relative to the emitter electrode, the n-type channel formed in the p-type base layer varnishes to stop injection of electron current from the n-type source layer to the n-type base layer. As a result, the IEGT turns OFF to enter in a blocking state.
JP-A-2000-101076, refer to a description from page 3 to page 4 and FIG. 1, discloses a semiconductor device which supplies different control signals to gate electrodes constituting such a unit cell.
Each of the Patent Literature 1 and Non-Patent Literature 2 also describes an IEGT having a planar gate structure different from the above-described trench gate structure. In the IEGT, a p-type base layer is formed on a surface region of a first surface side of an n-type base layer. Further, an n-type source layer is formed on a surface region of a p-type base layer. A gate electrode is formed on the n-type base layer and the p-type base layer via a gate insulating film. A unit cell contains one gate electrode. A common emitter electrode is formed on the p-type base layer and the n-type source layer. On the other hand, a p-type emitter layer is formed on a second surface of the n-type base layer. A collector electrode is formed on the p-type emitter layer.
The IEGT having such a planar gate structure is constituted such that a contact portion of the emitter electrode is substantially thinned by setting a gate electrode width sufficiently largely. With such formation, holes can be accumulated in the n-type base layer in a conductive state and an effect of conductive modulation can be increased, so that an ON-state voltage can be reduced. Operations of the IEGT having the planar gate structure at a turn-on time and at a turn-off time are substantially similar to those of the IEGT having the trench gate structure.
In each of an IEGT with such a trench gate structure and an IEGT with such a planar gate structure, when the IEGT is turned on in a state of application of a high voltage to the collector electrode, holes injected from the p-type emitter layer are accelerated by a high electric field in the n-type base layer to reach an interface between the n-type base layer at the portion where the contacts for the emitter electrode have been thinned and the gate insulating film. When a high voltage is applied to the collector electrode, a channel of holes is formed in an interface of the n-type base layer, because the potential of the n-type base layer is higher than the potential of the gate electrode. Negative charges are induced in the gate electrode by the channel of holes, so that a negative differential capacitance (CG=dQG/dVG) occurs in the gate electrode. Here, QG indicates charges accumulated in the gate electrode. The negative differential capacitance is hereinafter called “a negative capacitance”. When a gate resistance is connected to the gate electrode, a current flowing due to the negative capacitance causes a voltage drop via the gate resistance, which results in rising of a gate voltage VG. When the gate voltage VG rises, a collector current flows urgently, so that a turn-on action of the IEGT becomes unstable. When the IEGT is turned off, a capacitance component in a parasitic LCR circuit changes to a negative capacitance. As a result, the IEGT may be oscillated in some cases, so that a turn-off action of the IEGT becomes unstable.
In the IEGT with the trench gate structure, therefore, the negative capacitance is reduced by connecting an electrode inside the trench which does not contribute to electron injection to the emitter electrode or shallowing trench gates. In the IEGT with the planar gate structure, the gate insulating film on the n-type base layer is formed so as to be thicker than the gate insulating film on the p-type base layer to reduce a parasitic capacitance, thereby decreasing the negative capacitance. However, because these structures eventually suppress a conductive modulation effect enhancing or promoting electron injection, it becomes difficult to further lower the ON-state voltage.
When the IEGT is turned ON in a state of application of a high voltage to the collector electrode, a channel of holes is formed in the n-type base layer at an interface of a portion where the contacts for the emitter electrode have been thinned and negative charges are induced in the gate electrode due to the channel of holes, so that a negative capacitance occurs in the gate electrode. Since the gate voltage VG rises due to occurrence of the negative capacitance, a collector current flows urgently. As a result, there occurs such a problem that the turn-on action of the IEGT becomes unstable. In addition, since, when the IEGT is turned off, the capacitance component in the parasitic LCR circuit changes to a negative capacitance, which may cause oscillation in the IEGT, there is such a problem that the turn-off action of the IEGT becomes unstable.
On the other hand, in the IEGT with the trench gate structure, the negative capacitance is reduced by connecting an electrode inside the trench, which does not contribute to electron injection, to the emitter electrode or shallowing trench gates. In the IEGT with the planar gate structure, the negative capacitance is reduced by forming the gate insulating film on the n-type base layer so as to be thicker than the gate insulating film on the p-type base layer to reduce the parasitic capacitance. However, since these structures eventually suppress the conduction modulation effect enhancing electron injection, there is such a problem that it is made difficult to further lower the ON-state voltage.